Data sheets

Gigatron specifications

Dimensions: 25.2 cm x 17.6 cm x 3.0 cm

Weight: 500 g

Operating temperature: 18-27 ºC (65-80 ºF)

Operating voltage: 5.0 ± 0.25 V DC

Power consumption: < 90 mA

Clock speed: 6.25 MHz

Memory (RAM): 32K x 8 bits

Memory (ROM): 64K x 16 bits, UV erasable EPROM

Video: 59.98 Hz VGA compatible (standard DE-15 connector)

Resolution: 160×120 (typical), up to 160×480, in 64 colors

Audio: 3.5 mm jack

Block diagram and schematics

Circuit diagram: Schematics.pdf

AC Accumulator
ALU Arithmetic and Logic Unit
BUS-AC, BUS-D, BUS-IN Tri-state buffers
CLK Clock
CU Control Unit
D Data Register
IR Instruction Register
MAU Memory Address Unit
OUT Output Register
PC Program Counter
RAM Random Access Memory
ROM Program Memory
X Low Address Register
XOUT Extended Output
Y High Address Register

Instruction set

The native 8-bit instruction set has 16 instructions :

Memory load/store:        ld st
Logical operations:       anda ora xora
Arithmetic operations:    adda suba
Unconditional jumps:      jmp bra
Conditional jumps:        bgt beq bge blt bne ble
No operation:             nop

The instruction encoding is defined by this table:

Bit 5:7 Bit 2:4 Bit 0:1
Operation Mode Bus
0. LOAD
1. AND
2. OR
3. XOR
4. ADD
5. SUB
0. [D],AC
1. [X],AC
2. [Y,D],AC
3. [Y,X],AC
4. [D],X
5. [D],Y
6. [D],OUT
7. [Y,X++],OUT
0. D
1. RAM
2. AC
3. IN
6. STORE 0. [D]
1. [X]
2. [Y,D]
3. [Y,X]
4. [D],X
5. [D],Y
6. [D]
7. [Y,X++]
0. D
1. undef
2. AC
3. IN
7. JUMP 0. Far jump (jmp y,bus)
1. AC>0 (bgt bus)
2. AC=0 (beq bus)
3. AC≥0 (bge bus)
4. AC<0 (blt bus)
5. AC≠0 (bne bus)
6. AC≤0 (ble bus)
7. Branch always (bra bus)
0. D
1. [D]
2. AC
3. IN

 

Handy logic diagrams for the chips that are in the Gigatron, and links to their data sheets:

7400 series

  • 74HCT04 Hex inverter:
  • 74HCT32 Quad 2-input OR gate:
  • 74HCT138 3-to-8 decoder:
  • 74HCT139 Dual 2-to-4 decoder:
  • 74HCT153 Dual 4-to-1 multiplexer:
  • 74HCT157 Quad 2-to-1 multiplexer:
  • 74HCT161 4-bit binary counter:
  • 74HCT240 Octal inverting buffer with tri-state outputs:
  • 74HCT244 Octal buffer with tri-state outputs:
  • 74HCT273 Octal D-type flip-flop with reset:
  • 74HCT283 4-bit binary adder with fast carry:
  • 74HCT377 Octal D-type flip-flip with clock enable:
  • 74HC595 8-bit shift register with tri-state output:

Others

  • 27C1024 64Kx16 UV erasable EPROM (≤150ns):
  • 62256 32Kx8 static RAM (≤70ns):
  • MCP100 Supervisory circuit: